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Vol 4, No 2: IJDNS
Table of Contents
Achieving High Throughput of Steganography & Steganalysis for Concealing images Information Using Buffers Concept
YAHYA ENEID ABDULRIDHA, SONGFENG LU
FPGA based design and implementation of 128-bit processor performing specific operations used in the transmission & reception of digital data using data security algorithm written in VHDL code
Paresh Kumar Pasayat, Bhupesh Kumar Pasayat